Delay testing is very important for digital circuit testing in modern technologies of integrated circuits. Various sources of delay variations such as small delay defects, process variations, crosstalk, power supply noise and aging effects, affect the rated clock frequency of a design, and should be considered in delay testing. The cause of delay variations was introduced, and the related techniques on analysis, modeling, test generation, and circuit design according to different sources of delay variations were discussed. Furthermore, the main research results on delay testing of digital circuits considering delay variations in the Institute of Computing Technology, Chinese Academy of Sciences were introduced. The proposed techniques include delay testing considering crosstalk or power supply noise induced effects, statistical timing analysis based test path selection, super-speed testing, test optimization, and on-line timing checking, etc. Finally the trend of delay testing techniques for digital circuits was summarized.